1. Field of the Invention
This invention relates to a nonvolatile semiconductor memory device wherein a memory transistor includes a channel formation region, a gate electrode and a charge storage film disposed between the channel formation region and the gate electrode and having a charge storage function and also to a fabrication method for the nonvolatile semiconductor memory device.
2. Description of the Related Art
Nonvolatile semiconductor memory transistors can be roughly classified into a floating gate (FG) type and a metal-oxide-nitride-oxide semiconductor (MONOS) type. In a nonvolatile semiconductor transistor of the FG TYPE, a charge storage section (floating gate) for retaining charge extends continuously in a plane. Meanwhile, in a nonvolatile semiconductor transistor of the MONOS type, a charge storage section, which may be in the form of charge traps, is disposed discretely in a plane.
More particularly, in a nonvolatile semiconductor transistor of the FG type, a first dielectric film, a floating gate (FG) typically made of polycrystalline silicon, a second dielectric film typically formed from an oxide-nitride-oxide (ONO) film and a control gate are laminated in order on a semiconductor substrate or a well.
Meanwhile, in a nonvolatile semiconductor transistor of the MONOS type, a bottom insulating film, a nitride film (SixNy (0≦x≦1, 0≦y≦1)) which takes charge principally of storing charge, a top insulating film and a gate electrode are laminated in order on a semiconductor substrate or a well.
In the MONOS type nonvolatile semiconductor transistor, carrier traps serving as a charge storage section are spatially (that is, in a planar direction and a thicknesswise direction) spread discretely in a nitride film or in the proximity of an interface between a second dielectric film and the nitride film. Therefore, the charge retaining characteristic depends not only upon the film thickness of the bottom insulating film but also upon the energy distribution and the spatial distraction of charge caught by the carrier traps in the nitride film.
If a local leak current path is produced by a defect or the like in the bottom insulating film, then in a FG type memory transistor, most of the stored charge leaks to the substrate side along the leak path, resulting in deterioration of the charge retaining capacity. In contrast, in a MONOS type memory transistor, since the charge storage section is discretized spatially, local storage charge around the leak path merely leaks locally through the leak path. Therefore, the charge retaining characteristic of the entire memory transistor does not deteriorate readily. Therefore, in the MONOS type nonvolatile semiconductor transistor, the problem of deterioration of the charge retaining characteristic by a decrease of the thickness of the bottom insulating film is less serious than that in the case of the FG type memory transistor.
Nonvolatile memory devices are roughly divided into those of a stand alone type and those of a logic circuit incorporating type. A nonvolatile memory device of the stand alone type adopts a nonvolatile memory transistor as a memory element of a memory IC for exclusive use. Meanwhile, in a nonvolatile memory device of the logic circuit incorporating type, a memory block and a logic circuit block are provided as a core of a system-on-chip design, and a nonvolatile memory transistor is used as a memory element for retaining data in a nonvolatile fashion in the memory block.
In most of nonvolatile memory devices of the logic circuit incorporating type, a memory cell of a one-memory transistor type is used.
As a representative one of the one-memory transistor cells of the FG type, the ETOX cell of Intel is known. When ETOX cells are arranged into an array, a memory array system of the common source type wherein the ETOX cells have a common source is adopted.
The one-memory transistor cell of the MONOS type attracts attention in that the cell area can be reduced and the voltage can be reduced readily when compared with that of the FG type. As a representative one of the one-memory transistor cells of the MONOS type, a high-density memory cell of Saifun Semiconductors called NROM is known. Since the NROM cell utilizes discretized carrier traps as a charge storage section, it can store data of 2 bits/cell by injecting charge into two different regions in the cell. When NROM cells are arranged into an array, an impurity diffusion layer is shared by cells adjacent to each other in a row direction, and upon storage or readout of 2-bit data, the function of the impurity diffusion layer is changed over between the source and the drain. Further, a virtual ground array system is used as the high-density memory array system.
In data writing into ETOX cells and NROM cells, channel hot electron (CHE) injection in which a reduction of the voltage can be performed readily when compared with FN tunnel injection is used. In CHE injection writing, an electric field is applied to the source and the drain such that electrons supplied into a channel from the source side are excited in terms of energy in a high electric field region at a drain side end of the channel so as to generate hot electrons. Those of the generated hot electrons which have energy higher than the energy barrier height of the bottom insulating film (where the bottom insulating film is formed from a silicon dioxide film, 3.2 eV) are injected into a charge storage section (floating gate or carrier traps), whereupon the threshold voltage (Vth) increases.